PIC16F876T-10E/SO【PDF 116/218 页】IC MCU FLASH 8KX14 EE 28SOIC

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Sheet目录3889

112页 113页 114页 115页 [116页]117页 118页 119页 120页

PIC16F87X

DS30292C-page 200

2001 Microchip Technology Inc.

PWM Mode ................................................................ 61

Block Diagram .................................................... 61

Duty Cycle .......................................................... 61

Example Frequencies/Resolutions (Table) ........ 62

PWM Period ....................................................... 61

Special Event Trigger and A/D Conversions .............. 60

CCP. See Capture/Compare/PWM

CCP1CON .......................................................................... 17

CCP2CON .......................................................................... 17

CCPR1H Register .................................................. 15, 17, 57

CCPR1L Register ......................................................... 17, 57

CCPR2H Register ........................................................ 15, 17

CCPR2L Register ......................................................... 15, 17

CCPxM0 bit ........................................................................ 58

CCPxM1 bit ........................................................................ 58

CCPxM2 bit ........................................................................ 58

CCPxM3 bit ........................................................................ 58

CCPxX bit ........................................................................... 58

CCPxY bit ........................................................................... 58

CKE .................................................................................... 66

CKP .................................................................................... 67

Clock Polarity Select bit, CKP ............................................ 67

Code Examples

Call of a Subroutine in Page 1 from Page 0 ............... 26

EEPROM Data Read ................................................. 43

EEPROM Data Write .................................................. 43

FLASH Program Read ............................................... 44

FLASH Program Write ............................................... 45

Indirect Addressing .................................................... 27

Initializing PORTA ...................................................... 29

Saving STATUS, W and PCLATH Registers ........... 130

Code Protected Operation

Data EEPROM and FLASH Program Memory ........... 45

Code Protection ....................................................... 119, 133

Computed GOTO ............................................................... 26

Configuration Bits ............................................................. 119

Configuration Word .......................................................... 120

Conversion Considerations .............................................. 198

D/A ..................................................................................... 66

Data EEPROM ................................................................... 41

Associated Registers ................................................. 46

Code Protection ......................................................... 45

Reading ...................................................................... 43

Special Functions Registers ....................................... 41

Spurious Write Protection .......................................... 45

Write Verify ................................................................. 45

Writing to .................................................................... 43

Data Memory ...................................................................... 12

Bank Select (RP1:RP0 Bits) ................................. 12, 18

General Purpose Registers ........................................ 12

Special Function Registers ........................................ 15

Data/Address bit, D/A ......................................................... 66

DC and AC Characteristics Graphs and Tables ............... 177

DC Characteristics

Commercial and Industrial ............................... 152–156

Extended .......................................................... 157–160

Development Support ...................................................... 143

Device Differences ........................................................... 197

Device Overview .................................................................. 5

Direct Addressing ............................................................... 27

Electrical Characteristics .................................................. 149

Errata ................................................................................... 4

External Clock Input (RA4/T0CKI). See Timer0

External Interrupt Input (RB0/INT). See Interrupt Sources

Firmware Instructions ....................................................... 135

FLASH Program Memory ................................................... 41

Associated Registers ................................................. 46

Code Protection ......................................................... 45

Configuration Bits and Read/Write State ................... 46

Reading ..................................................................... 44

Special Function Registers ........................................ 41

Spurious Write Protection .......................................... 45

Write Protection ......................................................... 46

Write Verify ................................................................ 45

Writing to .................................................................... 44

FSR Register .................................................... 15, 16, 17, 27

General Call Address Sequence ........................................ 76

General Call Address Support ........................................... 76

General Call Enable bit ...................................................... 68

I/O Ports ............................................................................. 29

I2C ...................................................................................... 73

I2C Bus

Connection Considerations ........................................ 94

Sample Device Configuration .................................... 94

I2C Master Mode Reception ............................................... 84

I2C Master Mode Repeated START Condition .................. 81

I2C Mode Selection ............................................................ 73

I2C Module

Acknowledge Sequence Timing ................................ 86

Addressing ................................................................. 74

Associated Registers ................................................. 77

Baud Rate Generator ................................................. 79

Block Diagram ........................................................... 78

BRG Block Diagram ................................................... 79

BRG Reset due to SDA Collision ............................... 91

BRG Timing ............................................................... 80

Bus Arbitration ........................................................... 89

Bus Collision .............................................................. 89

Acknowledge ..................................................... 89

Repeated START Condition .............................. 92

Repeated START Condition Timing

(Case1) .............................................. 92

Repeated START Condition Timing

(Case2) .............................................. 92

START Condition ............................................... 90

START Condition Timing ..............................90, 91

STOP Condition ................................................. 93

STOP Condition Timing (Case1) ....................... 93

STOP Condition Timing (Case2) ....................... 93

Transmit Timing ................................................. 89

Bus Collision Timing .................................................. 89

Clock Arbitration ........................................................ 88

Clock Arbitration Timing (Master Transmit) ............... 88

Conditions to not give ACK Pulse .............................. 74

General Call Address Support ................................... 76

Master Mode .............................................................. 78

Master Mode 7-bit Reception Timing ......................... 85

Master Mode Block Diagram ..................................... 78

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